The effects of surface modification on the electrical properties of p–n + junction silicon nanowires grown by an aqueous electroless etching method

Background

AEE produces vertically aligned SiNWs in a single step, but the wires have considerably high surface roughness and inherent surface defects. Because of the large surface-to-volume ratio of nanowires, such defects strongly influence the electrical performance of devices built from them, and surface modification is therefore needed to obtain high-performance SiNW devices.

Design and approach

A planar p–n+ junction wafer, formed by phosphorus ion implantation into p-type Si, is etched in 4.9 M HF and 0.03 M AgNO3 at 60 °C to grow vertical SiNWs. The wires are then oxidized by RTO at 1,000 °C for ten cycles of 30 s under 100 mTorr oxygen, with N2 introduced during each temperature ramp to reduce fixed positive charges, and the thermal oxide is removed in HF for 1 min. The principle is that convex regions of the rough surface oxidize faster than concave regions, so consuming and stripping the oxide flattens the silicon surface. For electrical tests, the wires are embedded in SU-8 photoresist, with a 150 nm indium tin oxide (ITO) top electrode and a 50 nm Au bottom electrode.

How it was evaluated

Surface morphology was examined by field emission scanning electron microscopy, and as-fabricated, RTO-treated and RTO-treated/HF-etched SiNWs were compared by high-resolution transmission electron microscopy (HR-TEM). Water contact angles were measured on wires etched for 25 min, advancing and receding angles of RTO-treated wires were measured over a range of etching times, and control anneals were run in vacuum, nitrogen and an H2/N2 mixture. Dark current-voltage characteristics and diode ideality factors at 300 K, and photocurrent under white light (16 mW incident power on about 0.2 mm2), were compared between as-fabricated and RTO-treated/HF-etched devices.

Key results

SiNWs etched for 15 min formed a vertical array with uniform lengths of about 6 μm and diameters of approximately 100–150 nm. HR-TEM showed that the as-fabricated wires had rough surfaces; RTO produced an oxide thicker than 5 nm and reduced the silicon/oxide interface roughness, and after HF removal of the oxide the silicon surface was smoother than that of the as-fabricated wires.

The as-fabricated wires were superhydrophilic, with a contact angle of almost zero, whereas after RTO in oxygen the contact angle rose to 151.2°. Annealing in vacuum, nitrogen or the H2/N2 mixture caused no significant wettability change. The authors attribute the conversion to siloxane groups that lower the surface energy, together with the nanoscale structure: the advancing and receding contact angles differed by more than 21°, consistent with the Wenzel model, and the contact angle increased with etching time.

Both devices showed rectifying behavior, and the estimated depletion width of 1.87 μm was shorter than the p-side wire length, supporting junction formation within the wires. After ten RTO cycles and HF etching, the forward current density at 4 V was about 6.3 times that of untreated wires, which the authors attribute to reduced surface scattering and enhanced surface carrier mobility. The ideality factor decreased from 5.64 to 3.36, and the reverse current density at 4 V fell about 0.83-fold, consistent with fewer recombination-generation centers.

Under white light at a reverse bias of 10 V, the photocurrent density decreased from 53.5 to 41.8 μA/mm2 after surface modification. The authors relate this to the smaller light absorption area of the flattened surface, the smaller light absorption volume of the thinned wires and reduced light scattering at the smoother surface.

Open questions

The authors note that both ideality factors remain much larger than those of conventional Si diodes because of surface defects, and that the superhydrophobic state reverted within tens of minutes in air as water re-adsorbed. The dependence of current on the number of RTO cycles is stated without data shown.

How it connects to other research

The related review on metal-assisted chemical etching describes how metals, etchants and substrates govern the formation of silicon nanostructures; this study starts from wires made by that type of etching and changes them afterwards through oxidation and oxide removal.